Communication developments in the last decade have demonstrated what seems to be a migration from parallel data input/output (I/O) interface implementations to a preference for serial data I/O interfaces. Some of the motivations for preferring serial I/O over parallel I/O include reduced system costs through reduction in pin count, simplified system designs, and scalability to meet the ever increasing bandwidth requirements of today's communication needs. Serial I/O solutions will most probably be deployed in nearly every electronic product imaginable, including IC-to-IC interfacing, backplane connectivity, and box-to-box communications.
Although the need for increased communication bandwidth continues to drive future designs, support for the lower bandwidth legacy systems still remains. As such, the future designs are required to provide a wide range of scalability, whereby data rate, slew rate, common-mode voltage, and many other physical (PHY) layer attributes are adaptable. For example, a particular transmitter/receiver pair may be configured for alternating current (AC) coupled, ground referenced signaling as is required by the PCI Express (PCIe) standard. Once configured, however, the same transmitter/receiver pair is precluded from supporting other transmission standards having different common mode requirements.
Efforts continue, therefore, to provide a single receive interface that supports multiple communication standards having various coupling and common mode requirements. In addition to providing the flexibility to handle multiple communication standards, the programmably terminated receive interface should not sacrifice signal integrity for those communication standards that do not require programmable terminations.